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| slos219d ? june 1999 ? revised february 2004 1 www.ti.com post office box 1443 ? houston, texas 77251?1443 wide bandwidth . . . 10 mhz high output drive ? i oh . . . 57 ma at v dd ? 1.5 v ? i ol . . . 55 ma at 0.5 v high slew rate ? sr+ . . . 16 v/ s ? sr? . . . 19 v/ s wide supply range . . . 4.5 v to 16 v supply current . . . 1.9 ma/channel ultralow power shutdown mode i dd . . . 125 a/channel low input noise voltage ...7 nv hz input offset voltage ...60 v ultra-small packages ? 8 or 10 pin msop (tlc070/1/2/3) description the first members of ti?s new bimos ge neral-purpose operational amplifier family are the tlc07x. the bimos family concept is simple: provide an upgrade path for bifet users who are moving away from dual-supply to single-supply systems and demand higher ac and dc performance. with performance rated from 4.5 v to 16 v across commercial (0 c to 70 c) and an extended industrial temperature range (?40 c to 125 c), bimos suits a wide range of audio, automotive, industrial and instrumentation applications. familiar features like of fset nulling pins, and new features like msop powerpad ? packages and shutdown modes, enable higher levels of performance in a variety of applications. developed in ti?s patented lbc3 bicmos process, the new bimos amplifiers combine a very high input impedance low-noise cmos front end with a high-drive bipolar output stage, thus providing the optimum performance features of both. ac performance improvements over the tl07x bifet predecessors include a bandwidth of 10 mhz (an increase of 300%) and voltage noise of 7 nv/ hz (an improvement of 60%). dc improvements include a factor of 4 reduction in input offset voltage down to 1.5 mv (maximum) in the standard grade, and a power supply rejection improvement of greater than 40 db to 130 db. added to this list of impressive features is the ability to drive 50-ma loads comfortably from an ultrasmall-footprint msop powerpad package, which positions the tlc07x as the ideal high-performance general-purpose operational amplifier family. family package table device no. of package types shutdown universal device no. of channels msop pdip soic tssop shutdown universal evm board tlc070 1 8 8 8 ? yes tlc071 1 8 8 8 ? refer to the evm tlc072 2 8 8 8 ? ? refer to the evm selection guide tlc073 2 10 14 14 ? yes selection guide (lit# slou060) tlc074 4 ? 14 14 20 ? (lit# slou060) tlc075 4 ? 16 16 20 yes copyright ? 2000?2004, t exas instruments incorporated please be aware that an important notice concerning avail ability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. operational amplifier ? + powerpad is a trademark of texas instruments.
slos219d ? june 1999 ? revised february 2004 2 www.ti.com post office box 1443 ? houston, texas 77251?1443 tlc070 and tlc071 available options packaged devices t a small outline ? small outline ? symbol plastic dip t a small outline (d) ? small outline (dgn) ? symbol plastic dip (p) 0 c to 70 c tlc070cd tlc071cd tlc070cdgn tlc071cdgn xxtiacs xxtiacu tlc070cp tlc071cp ?40 c to 125 c tlc070id tlc071id tlc070idgn tlc071idgn xxtiact xxtiacv tlc070ip tlc071ip ?40 c to 125 c tlc070aid tlc071aid ? ? ? ? tlc070aip tlc071aip ? this package is available taped and reeled. to order this packaging option, add an r suffix to the part number (e.g., tlc070cdr ). tlc072 and tlc073 available options packaged devices t a small outline msop plastic dip plastic dip t a outline (d) ? (dgn) ? symbol ? (dgq) ? symbol ? dip (n) dip (p) 0 c to 70 c tlc072cd tlc073cd tlc072cdgn ? xxtiadv ? ? tlc073cdgq ? xxtiadx ? tlc073cn tlc072cp ? ?40 c to 125 c tlc072id tlc073id tlc072idgn ? xxtiadw ? ? tlc073idgq ? xxtiady ? tlc073in tlc072ip ? ?40 c to 125 c tlc072aid tlc073aid ? ? ? ? ? ? ? ? ? tlc073ain tlc072aip ? ? this package is available taped and reeled. to order this packaging option, add an r suffix to the part number (e.g., tlc072cdr ). ? xx represents the device date code. tlc074 and tlc075 available options packaged devices t a small outline (d) ? plastic dip (n) tssop (pwp) ? 0 c to 70 c tlc074cd tlc075cd tlc074cn tlc075cn tlc074cpwp tlc075cpwp ?40 c to 125 c tlc074id tlc075id tlc074in tlc075in tlc074ipwp tlc075ipwp ?40 c to 125 c tlc074aid tlc075aid TLC074AIN tlc075ain tlc074aipwp tlc075aipwp ? this package is available taped and reeled. to order this packaging option, add an r suffix to the part number (e.g., tlc074cdr). slos219d ? june 1999 ? revised february 2004 3 www.ti.com post office box 1443 ? houston, texas 77251?1443 tlc07x package pinouts nc ? no internal connection 1 2 3 4 8 7 6 5 null in ? in + gnd shdn v dd out null tlc070 d, dgn or p package (top view) 1 2 3 4 8 7 6 5 null in ? in + gnd nc v dd out null tlc071 d, dgn or p package (top view) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1out 1in ? 1in+ gnd nc 1shdn nc v dd 2out 2in ? 2in+ nc 2shdn nc (top view) 1 2 3 4 8 7 6 5 1out 1in ? 1in + gnd v dd 2out 2in ? 2in+ tlc072 d, dgn, or p package (top view) tlc073 d or n package 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1out 1in ? 1in+ v dd 2in+ 2in ? 2out 1/2shdn 4out 4in ? 4in+ gnd 3in + 3in? 3out 3/4shdn (top view) tlc075 d or n package 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1out 1in ? 1in+ v dd 2in+ 2in ? 2out 4out 4in ? 4in+ gnd 3in+ 3in ? 3out (top view) tlc074 d or n package 1 2 3 4 5 10 9 8 7 6 1out 1in ? 1in+ gnd 1 shdn v dd 2out 2in ? 2in+ 2shdn tlc073 dgq package (top view) 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 1out 1in? 1in+ vdd 2in+ 2in? 2out 1/2shdn nc nc 4out 4in? 4in+ gnd 3in+ 3in? 3out 3/4shdn nc nc (top view) tlc075 pwp package 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 (top view) tlc074 pwp package 1out 1in? 1in+ vdd 2in+ 2in? 2out nc nc nc 4out 4in? 4in+ gnd 3in+ 3in? 3out nc nc nc typical pin 1 indicators printed or molded dot bevel edges pin 1 molded ?u? shape pin 1 stripe pin 1 pin 1 slos219d ? june 1999 ? revised february 2004 4 www.ti.com post office box 1443 ? houston, texas 77251?1443 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage, v dd (see note 1) 17 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . differential input voltage range, v id v dd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous total power dissipation see dissipation rating table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating free-air temperature range, t a : c suffix 0 c to 70 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i suffix ?40 c to 125 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . maximum junction temperature, t j 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ?65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, a nd functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating conditi ons? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. note 1: all voltage values, except differential voltages, are with respect to gnd . dissipation rating table package jc ( c/w) ja ( c/w) t a 25 c power rating d (8) 38.3 176 710 mw d (14) 26.9 122.3 1022 mw d (16) 25.7 114.7 1090 mw dgn (8) 4.7 52.7 2.37 w dgq (10) 4.7 52.3 2.39 w n (14, 16) 32 78 1600 mw p (8) 41 104 1200 mw pwp (20) 1.40 26.1 4.79 w recommended operating conditions min max unit supply voltage, v dd single supply 4.5 16 v supply voltage, v dd split supply 2.25 8 v common-mode input voltage, v icr +0.5 v dd ?0.8 v shutdown on/off voltage level ? v ih 2 v shutdown on/off voltage level ? v ol 0.8 v operating free-air temperature, t a c-suffix 0 70 c operating free-air temperature, t a i-suffix ?40 125 c ? relative to the voltage on the gnd terminal of the device. slos219d ? june 1999 ? revised february 2004 5 www.ti.com post office box 1443 ? houston, texas 77251?1443 electrical characteristics at specified free-air temperature, v dd = 5 v (unless otherwise noted) parameter test conditions t a ? min typ max unit tlc070/1/2/3, 25 c 390 1900 v io input offset voltage v dd = 5 v, tlc070/1/2/3, tlc074/5 full range 3000 v v io input offset voltage v dd = 5 v, v ic = 2.5 v, tlc070/1/2/3a, 25 c 390 1400 v v ic = 2.5 v, v o = 2.5 v, r s = 50 ? ? 1.2 v/ c vio temperature coefficient of input offset voltage 1.2 v/ c 25 c 0.7 50 i io input offset current v dd = 5 v, tlc07xc full range 100 pa i io input offset current v dd = 5 v, v ic = 2.5 v, tlc07xi full range 700 pa v ic = 2.5 v, v o = 2.5 v, r = 50 ? c 1.5 50 i ib input bias current v o = 2.5 v, r s = 50 ? tlc07xc full range 100 pa i ib input bias current tlc07xi full range 700 pa v icr common-mode input voltage r s = 50 ? c 0.5 to 4.2 v v icr common-mode input voltage r s = 50 ? full range 0.5 to 4.2 v i oh = ? 1 ma 25 c 4.1 4.3 i oh = ? 1 ma full range 3.9 i oh = ? 20 ma 25 c 3.7 4 i oh = ? 20 ma full range 3.5 v oh high-level output voltage v ic = 2.5 v i oh = ? 35 ma 25 c 3.4 3.8 v v oh high-level output voltage v ic = 2.5 v i oh = ? 35 ma full range 3.2 v 25 c 3.2 3.6 i oh = ? 50 ma ?40 c to 85 c 3 i ol = 1 ma 25 c 0.18 0.25 i ol = 1 ma full range 0.35 i ol = 20 ma 25 c 0.35 0.39 i ol = 20 ma full range 0.45 v ol low-level output voltage v ic = 2.5 v i ol = 35 ma 25 c 0.43 0.55 v v ol low-level output voltage v ic = 2.5 v i ol = 35 ma full range 0.7 v 25 c 0.48 0.63 i ol = 50 ma ?40 c to 85 c 0.7 i os short-circuit output current sourcing 25 c 100 ma i os short-circuit output current sinking 25 c 100 ma i o output current v oh = 1.5 v from positive rail 25 c 57 ma i o output current v ol = 0.5 v from negative rail 25 c 55 ma ? full range is 0 c to 70 c for c suffix and ? 40 c to 125 c for i suffix. if not specified, full range is ? 40 c to 125 c. slos219d ? june 1999 ? revised february 2004 6 www.ti.com post office box 1443 ? houston, texas 77251?1443 electrical characteristics at specified free-air temperature, v dd = 5 v (unless otherwise noted) (continued) parameter test conditions t a ? min typ max unit a vd large-signal differential voltage v o(pp) = 3 v, r l = 10 k ? 25 c 100 120 db a vd large-signal differential voltage amplification v o(pp) = 3 v, r l = 10 k ? full range 100 db r i(d) differential input resistance 25 c 1000 g ? c ic common-mode input capacitance f = 10 khz 25 c 22.9 pf z o closed-loop output impedance f = 10 khz, a v = 10 25 c 0.25 ? cmrr common-mode rejection ratio v ic = 1 to 3 v, r s = 50 ? 25 c 80 95 db cmrr common-mode rejection ratio v ic = 1 to 3 v, r s = 50 ? full range 80 db k svr supply voltage rejection ratio v dd = 4.5 v to 16 v, v ic = v dd /2, 25 c 80 100 db k svr supply voltage rejection ratio ( ? v dd / ? v io ) v dd = 4.5 v to 16 v, no load v ic = v dd /2, full range 80 db i dd supply current (per channel) v o = 2.5 v, no load 25 c 1.9 2.5 ma i dd supply current (per channel) v o = 2.5 v, no load full range 3.5 ma i dd(shdn) supply current in shutdown mode (per channel) shdn 0.8 v 25 c 125 200 a i dd(shdn ) mode (per channel) (tlc070, tlc073, tlc075) shdn 0.8 v full range 250 a ? full range is 0 c to 70 c for c suffix and ? 40 c to 125 c for i suffix. if not specified, full range is ? 40 c to 125 c. slos219d ? june 1999 ? revised february 2004 7 www.ti.com post office box 1443 ? houston, texas 77251?1443 operating characteristics at specified free-air temperature, v dd = 5 v (unless otherwise noted) parameter test conditions t a ? min typ max unit sr+ positive slew rate at unity gain v o(pp) = 0.8 v, c l = 50 pf, 25 c 10 16 v/ s sr+ positive slew rate at unity gain v o(pp) = 0.8 v, r l = 10 k ? c l = 50 pf, full range 9.5 v/ s sr? negative slew rate at unity gain v o(pp) = 0.8 v, c l = 50 pf, 25 c 12.5 19 v/ s sr? negative slew rate at unity gain v o(pp) = 0.8 v, r l = 10 k ? c l = 50 pf, full range 10 v/ s v n equivalent input noise voltage f = 100 hz 25 c 12 nv/ hz v n equivalent input noise voltage f = 1 khz 25 c 7 nv/ hz i n equivalent input noise current f = 1 khz 25 c 0.6 fa / hz v o(pp) = 3 v, a v = 1 0.002% thd + n total harmonic distortion plus noise v o(pp) = 3 v, r l = 10 k ? and 250 ? , f = 1 khz a v = 10 25 c 0.012% thd + n total harmonic distortion plus noise r l = 10 k ? and 250 ? , f = 1 khz a v = 100 25 c 0.085% t (on) amplifier turnon time ? r l = 10 k ? c 0.15 s t (off) amplifier turnoff time ? r l = 10 k ? 25 c 1.3 s gain-bandwidth product f = 10 khz, r l = 10 k ? 25 c 10 mhz v (step)pp = 1 v, a v = ?1, 0.1% 0.18 t s settling time a v = ?1, c l = 10 pf, r l = 10 k ? 0.01% 25 c 0.39 s t s settling time v (step)pp = 1 v, a v = ?1, 0.1% 25 c 0.18 s a v = ?1, c l = 47 pf, r l = 10 k ? 0.01% 0.39 m phase margin r l = 10 k ? , c l = 50 pf 25 c 32 m phase margin r l = 10 k ? , c l = 0 pf 25 c 40 gain margin r l = 10 k ? , c l = 50 pf 25 c 2.2 db gain margin r l = 10 k ? , c l = 0 pf 25 c 3.3 db ? full range is 0 c to 70 c for c suffix and ? 40 c to 125 c for i suffix. if not specified, full range is ? 40 c to 125 c. ? disable time and enable time are defined as the interval between application of the logic signal to shdn and the point at which the sup ply current has reached half its final value. slos219d ? june 1999 ? revised february 2004 8 www.ti.com post office box 1443 ? houston, texas 77251?1443 electrical characteristics at specified free-air temperature, v dd = 12 v (unless otherwise noted) parameter test conditions t a ? min typ max unit tlc070/1/2/3, 25 c 390 1900 v io input offset voltage v dd = 12 v tlc070/1/2/3, tlc074/5 full range 3000 v v io input offset voltage v dd = 12 v v ic = 6 v, tlc070/1/2/3a, 25 c 390 1400 v v ic = 6 v, v o = 6 v, r s = 50 ? ? 1.2 v/ c vio temperature coefficient of input offset voltage 1.2 v/ c 25 c 0.7 50 i io input offset current v dd = 12 v tlc07xc full range 100 pa i io input offset current v dd = 12 v v ic = 6 v, tlc07xi full range 700 pa v ic = 6 v, v o = 6 v, r = 50 ? c 1.5 50 i ib input bias current v o = 6 v, r s = 50 ? tlc07xc full range 100 pa i ib input bias current tlc07xi full range 700 pa v icr common-mode input voltage r s = 50 ? c 0.5 to 11.2 v v icr common-mode input voltage r s = 50 ? full range 0.5 to 11.2 v i oh = ? 1 ma 25 c 11.1 11.2 i oh = ? 1 ma full range 11 i oh = ? 20 ma 25 c 10.8 10.9 i oh = ? 20 ma full range 10.7 v oh high-level output voltage v ic = 6 v i oh = ? 35 ma 25 c 10.6 10.7 v v oh high-level output voltage v ic = 6 v i oh = ? 35 ma full range 10.3 v 25 c 10.4 10.5 i oh = ? 50 ma ?40 c to 85 c 10.3 i ol = 1 ma 25 c 0.17 0.25 i ol = 1 ma full range 0.35 i ol = 20 ma 25 c 0.35 0.45 i ol = 20 ma full range 0.5 v ol low-level output voltage v ic = 6 v i ol = 35 ma 25 c 0.4 0.52 v v ol low-level output voltage v ic = 6 v i ol = 35 ma full range 0.6 v 25 c 0.45 0.6 i ol = 50 ma ?40 c to 85 c 0.65 i os short-circuit output current sourcing 25 c 150 ma i os short-circuit output current sinking 25 c 150 ma i o output current v oh = 1.5 v from positive rail 25 c 57 ma i o output current v ol = 0.5 v from negative rail 25 c 55 ma ? full range is 0 c to 70 c for c suffix and ? 40 c to 125 c for i suffix. if not specified, full range is ? 40 c to 125 c. slos219d ? june 1999 ? revised february 2004 9 www.ti.com post office box 1443 ? houston, texas 77251?1443 electrical characteristics at specified free-air temperature, v dd = 12 v (unless otherwise noted) (continued) parameter test conditions t a ? min typ max unit a vd large-signal differential voltage v o(pp) = 8 v, r l = 10 k ? 25 c 120 140 db a vd large-signal differential voltage amplification v o(pp) = 8 v, r l = 10 k ? full range 120 db r i(d) differential input resistance 25 c 1000 g ? c ic common-mode input capacitance f = 10 khz 25 c 21.6 pf z o closed-loop output impedance f = 10 khz, a v = 10 25 c 0.25 ? cmrr common-mode rejection ratio v ic = 1 to 10 v, r s = 50 ? 25 c 80 100 db cmrr common-mode rejection ratio v ic = 1 to 10 v, r s = 50 ? full range 80 db k svr supply voltage rejection ratio v dd = 4.5 v to 16 v, v ic = v dd /2, 25 c 80 100 db k svr supply voltage rejection ratio ( ? v dd / ? v io ) v dd = 4.5 v to 16 v, no load v ic = v dd /2, full range 80 db i dd supply current (per channel) v o = 7.5 v, no load 25 c 2.1 2.9 ma i dd supply current (per channel) v o = 7.5 v, no load full range 3.5 ma i dd(shdn) supply current in shutdown mode (tlc070, tlc073, shdn 0.8 v 25 c 125 200 a i dd(shdn ) mode (tlc070, tlc073, tlc075) (per channel) shdn 0.8 v full range 250 a ? full range is 0 c to 70 c for c suffix and ? 40 c to 125 c for i suffix. if not specified, full range is ? 40 c to 125 c. slos219d ? june 1999 ? revised february 2004 10 www.ti.com post office box 1443 ? houston, texas 77251?1443 operating characteristics at specified free-air temperature, v dd = 12 v (unless otherwise noted) parameter test conditions t a ? min typ max unit sr+ positive slew rate at unity gain v o(pp) = 2 v, c l = 50 pf, 25 c 10 16 v/ s sr+ positive slew rate at unity gain v o(pp) = 2 v, r l = 10 k ? c l = 50 pf, full range 9.5 v/ s sr? negative slew rate at unity gain v o(pp) = 2 v, c l = 50 pf, 25 c 12.5 19 v/ s sr? negative slew rate at unity gain v o(pp) = 2 v, r l = 10 k ? c l = 50 pf, full range 10 v/ s v n equivalent input noise voltage f = 100 hz 25 c 12 nv/ hz v n equivalent input noise voltage f = 1 khz 25 c 7 nv/ hz i n equivalent input noise current f = 1 khz 25 c 0.6 fa / hz v o(pp) = 8 v, a v = 1 0.002% thd + n total harmonic distortion plus noise v o(pp) = 8 v, r l = 10 k ? and 250 ? , f = 1 khz a v = 10 25 c 0.005% thd + n total harmonic distortion plus noise r l = 10 k ? and 250 ? , f = 1 khz a v = 100 25 c 0.022% t (on) amplifier turnon time ? r l = 10 k ? c 0.47 s t (off) amplifier turnoff time ? r l = 10 k ? 25 c 2.5 s gain-bandwidth product f = 10 khz, r l = 10 k ? 25 c 10 mhz v (step)pp = 1 v, a v = ?1, 0.1% 0.17 t s settling time a v = ?1, c l = 10 pf, r l = 10 k ? 0.01% 25 c 0.22 s t s settling time v (step)pp = 1 v, a v = ?1, 0.1% 25 c 0.17 s a v = ?1, c l = 47 pf, r l = 10 k ? 0.01% 0.29 m phase margin r l = 10 k ? , c l = 50 pf 25 c 37 m phase margin r l = 10 k ? , c l = 0 pf 25 c 42 gain margin r l = 10 k ? , c l = 50 pf 25 c 3.1 db gain margin r l = 10 k ? , c l = 0 pf 25 c 4 db ? full range is 0 c to 70 c for c suffix and ? 40 c to 125 c for i suffix. if not specified, full range is ? 40 c to 125 c. ? disable time and enable time are defined as the interval between application of the logic signal to shdn and the point at which the sup ply current has reached half its final value. slos219d ? june 1999 ? revised february 2004 11 www.ti.com post office box 1443 ? houston, texas 77251?1443 typical characteristics table of graphs figure v io input offset voltage vs common-mode input voltage 1, 2 i io input offset current vs free-air temperature 3, 4 i ib input bias current vs free-air temperature 3, 4 v oh high-level output voltage vs high-level output current 5, 7 v ol low-level output voltage vs low-level output current 6, 8 z o output impedance vs frequency 9 i dd supply current vs supply voltage 10 psrr power supply rejection ratio vs frequency 11 cmrr common-mode rejection ratio vs frequency 12 v n equivalent input noise voltage vs frequency 13 v o(pp) peak-to-peak output voltage vs frequency 14, 15 crosstalk vs frequency 16 differential voltage gain vs frequency 17, 18 phase vs frequency 17, 18 m phase margin vs load capacitance 19, 20 gain margin vs load capacitance 21, 22 gain-bandwidth product vs supply voltage 23 sr slew rate vs supply voltage vs free-air temperature 24 25, 26 thd + n total harmonic distortion plus noise vs frequency 27, 28 thd + n total harmonic distortion plus noise vs peak-to-peak output voltage 29, 30 large-signal follower pulse response 31, 32 small-signal follower pulse response 33 large-signal inverting pulse response 34, 35 small-signal inverting pulse response 36 shutdown forward isolation vs frequency 37, 38 shutdown reverse isolation vs frequency 39, 40 shutdown supply current vs supply voltage 41 shutdown supply current vs free-air temperature 42 shutdown pulse 43, 44 slos219d ? june 1999 ? revised february 2004 12 www.ti.com post office box 1443 ? houston, texas 77251?1443 typical characteristics figure 1 input offset voltage vs common-mode input voltage 100 75 50 25 0 ?25 0.0 0.5 1.0 1.5 2.0 2.5 3.0 125 150 175 200 250 225 3.5 4.0 4.5 5.0 v icr ? common-mode input voltage ? v v dd = 5 v t a = 25 c v io ? input offset voltage ? v figure 2 input offset voltage vs common-mode input voltage ?150 ?175 ?200 ?225 ?250 ?275 0123456 ?125 ?100 ?75 ?50 0 ?25 789101112 v icr ? common-mode input voltage ? v v io ? input offset voltage ? v v dd = 12 v t a = 25 c figure 3 input bias current and input offset current vs free-air temperature ?120 ?55 ?40 ?80 ?20 ?10 5 t a ? free?air temperature ? c ?40 ?60 ?100 ?25 20 35 50 i ib / i io input bias and input offset current ? pa i ib ? v dd = 5v 65 80 95 110 125 0 20 i io figure 4 input bias current and input offset current vs free-air temperature ?120 ?55 ?40 ?80 ?20 ?10 5 t a ? free-air temperature ? c i io ?40 ?60 ?100 ?25 ?140 ?160 20 35 50 i ib / i io input bias and input offset current ? pa i ib ? v dd = 12 v 65 80 95 110 125 0 20 figure 5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 5 10 15 20 25 30 35 40 45 50 high-level output voltage vs high-level output current i oh - high-level output current - ma v dd = 5 v v oh ? high-level output voltage ? v t a = 125 c t a = 70 c t a = 25 c t a = ?40 c figure 6 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 5 10 15 20 25 30 35 40 45 50 low-level output voltage vs low-level output current i ol - low-level output current - ma t a = 125 c t a = 70 c t a = 25 c t a = ?40 c v dd = 5 v ol v ? low-level output voltage ? v figure 7 9.0 9.5 10.0 10.5 11.0 11.5 12.0 0 5 10 15 20 25 30 35 40 45 50 high-level output voltage vs high-level output current i oh - high-level output current - ma t a = 125 c t a = 70 c t a = 25 c t a = ?40 c v oh ? high-level output voltage ? v v dd = 12 v figure 8 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 5 10 15 20 25 30 35 40 45 50 low-level output voltage vs low-level output current i ol - low-level output current - ma t a = 125 c t a = 25 c t a = ?40 c ol v ? low-level output voltage ? v v dd = 12 v t a = 70 c figure 9 output impedance vs frequency f - frequency - hz 100k 1000 1m 10m ? output impedance ? z o ? 10k 100 1k 100 10 1 0.10 0.01 a v = 100 a v = 10 a v = 1 v dd = 5 v and 12 v t a = 25 c slos219d ? june 1999 ? revised february 2004 13 www.ti.com post office box 1443 ? houston, texas 77251?1443 typical characteristics figure 10 0.0 0.5 1.0 1.5 2.0 2.5 3.0 45678910111213141516 supply current vs supply voltage v dd ? supply voltage - v a v = 1 shdn = v dd per channel t a = 125 c t a = 70 c t a = 25 c t a = ?40 c i dd ? supply current ? ma figure 11 power supply rejection ratio vs frequency 40 010 80 140 1k 10k f ? frequency ? hz v dd = 12 v 120 100 60 100 20 0 ? power supply rejection ratio ? db psrr 100k 1m 10m v dd = 5 v 0 20 40 60 80 100 120 140 figure 12 common-mode rejection ratio vs frequency f - frequency - hz 100k 1m 10m 10k 100 1k cmrr ? common-mode rejection ratio ? db v dd = 5 v and 12 v t a = 25 c figure 13 equivalent input noise voltage vs frequency 0 10 100 10 25 10k 100k f ? frequency ? hz v dd = 5 v 40 v dd = 12 v 35 30 20 15 5 1k nv/ hz ? equivalent input noise voltage ? v n figure 14 0 2 4 6 8 10 12 peak-to-peak output voltage vs frequency f - frequency - hz 100k 1m 10m 10k thd+n < = 5% r l = 600 ? t a = 25 c v dd = 12 v v dd = 5 v v o(pp) ? peak-to-peak output voltage ? v figure 15 0 2 4 6 8 10 12 peak-to-peak output voltage vs frequency f - frequency - hz 100k 1m 10m 10k v o(pp) ? peak-to-peak output voltage ? v thd+n < = 5% r l = 10 k ? t a = 25 c v dd = 12 v v dd = 5 v figure 16 ?120 10 100 ?80 ?20 10k f ? frequency ? hz 0 ?40 ?60 ?100 1k ?140 ?160 crosstalk ? db 100k crosstalk vs frequency v dd = 5 v and 12 v a v = 1 r l = 10 k ? v i(pp) = 2 v for all channels slos219d ? june 1999 ? revised february 2004 14 www.ti.com post office box 1443 ? houston, texas 77251?1443 typical characteristics figure 17 differential voltage gain and phase vs frequency 0 1k 10k 20 50 1m 10m f ? frequency ? hz gain 80 70 60 40 30 10 100k ?10 ?20 ? different voltage gain ? db a vd 100m ?180 ?135 0 ?45 ?90 ?225 phase v dd = 2.5 v r l = 10 k ? c l = 0 pf t a = 25 c phase ? figure 18 differential voltage gain and phase vs frequency 0 1k 10k 20 50 1m 10m f ? frequency ? hz gain 80 70 60 40 30 10 100k ?10 ?20 ? different voltage gain ? db a vd 100m ?180 ?135 0 ?45 ?90 ?225 phase v dd = 6 v r l = 10 k ? c l = 0 pf t a = 25 c phase ? figure 19 phase margin vs load capacitance 10 10 20 35 c l ? load capacitance ? pf 30 25 15 100 5 0 r null = 0 ? r null = 20 ? r null = 50 ? r null = 100 ? v dd = 5 v r l = 10 k ? t a = 25 c 40 m ? phase margin figure 20 phase margin vs load capacitance 10 10 20 35 c l ? load capacitance ? pf 30 25 15 100 5 0 r null = 0 ? r null = 20 ? r null = 50 ? r null = 100 ? v dd = 12 v r l = 10 k ? t a = 25 c 40 45 m ? phase margin figure 21 gain margin vs load capacitance 1 10 2 4 c l ? load capacitance ? pf 3.5 2.5 1.5 100 0.5 0 ? gain margin ? db g r null = 0 ? r null = 20 ? r null = 50 ? r null = 100 ? v dd = 5 v r l = 10 k ? t a = 25 c 3 figure 22 gain margin vs load capacitance 1 10 2 3.5 c l ? load capacitance ? pf 3 2.5 1.5 100 0.5 0 r null = 0 ? r null = 20 ? r null = 50 ? r null = 100 ? v dd = 12 v r l = 10 k ? t a = 25 c 4 4.5 5 m ? phase margin ? db figure 23 9.0 9.1 9.2 9.3 9.4 9.5 9.6 9.7 9.8 9.9 10.0 45678910111213141516 c l = 11 pf t a = 25 c gain bandwidth product vs supply voltage v dd - supply voltage - v gbwp - gain bandwidth product - mhz r l = 10 k ? r l = 600 ? figure 24 12 13 14 15 16 17 18 19 20 21 22 45678910111213141516 slew rate vs supply voltage v dd - supply voltage - v r l = 600 ? and 10 k ? c l = 50 pf a v = 1 sr ? slew rate ? v/ s slew rate + slew rate ? slos219d ? june 1999 ? revised february 2004 15 www.ti.com post office box 1443 ? houston, texas 77251?1443 typical characteristics figure 25 0 5 10 15 20 25 ?55 ?35 ?15 5 25 45 65 85 105 125 slew rate vs free-air temperature t a - free-air temperature - c v dd = 5 v r l = 600 ? and 10 k ? c l = 50 pf a v = 1 sr ? slew rate ? v/ s slew rate + slew rate ? figure 26 0 5 10 15 20 25 ?55 ?35 ?15 5 25 45 65 85 105 125 slew rate vs free-air temperature t a - free-air temperature - c v dd = 12 v r l = 600 ? and 10 k ? c l = 50 pf a v = 1 sr ? slew rate ? v/ s slew rate + slew rate ? figure 27 total harmonic distortion plus noise vs frequency 0.001 100 1k 0.01 0.1 10k 100k f ? frequency ? hz v dd = 5 v r l = 10 k ? v o(pp) = 2 v a v = 100 a v = 10 a v = 1 1 total harmonic distortion + noise ? % figure 28 total harmonic distortion plus noise vs frequency total harmonic distortion + noise ? % 0.001 100 1k 0.01 0.1 10k 100k f ? frequency ? hz a v = 100 v dd = 12 v r l = 10 k ? v o(pp) = 12 v a v = 10 a v = 1 figure 29 total harmonic distortion plus noise vs peak-to-peak output voltage total harmonic distortion + noise ? % 0.0001 0.25 0.75 0.01 0.1 1.25 1.75 v o(pp) ? peak-to-peak output voltage ? v 2.25 2.75 3.25 3.75 0.001 1 10 v dd = 5 v a v = 1 f = 1 khz r l = 250 ? r l = 600 ? r l = 10 k ? figure 30 total harmonic distortion plus noise vs peak-to-peak output voltage total harmonic distortion + noise ? % 0.0001 0.5 2.5 0.01 0.1 4.5 6.5 v o(pp) ? peak-to-peak output voltage ? v 8.5 10.5 0.001 1 10 v dd = 12 v a v = 1 f = 1 khz r l = 250 ? r l = 600 ? r l = 10 k ? figure 31 t ? time ? s 0 0.2 0.4 0.6 0.8 1 1.2 large signal follower pulse response 1.4 1.6 1.8 2 ? output voltage ? v v o v i (1 v/div) v o (500 mv/div) v dd = 5 v r l = 600 ? and 10 k ? c l = 8 pf t a = 25 c figure 32 t ? time ? s 0 0.2 0.4 0.6 0.8 1 1.2 large signal follower pulse response 1.4 1.6 1.8 2 ? output voltage ? v v o v i (5 v/div) v o (2 v/div) v dd = 12 v r l = 600 ? and 10 k ? c l = 8 pf t a = 25 c figure 33 small signal follower pulse response 0 0.1 0.3 0.4 t ? time ? s 0.2 0.5 0.6 0.7 0.8 0.9 0.10 v o (50mv/div) v i (100mv/div) v dd = 5 v and 12 v r l = 600 ? and 10 k ? c l = 8 pf t a = 25 c ? output voltage ? v v o slos219d ? june 1999 ? revised february 2004 16 www.ti.com post office box 1443 ? houston, texas 77251?1443 typical characteristics figure 34 t ? time ? s 0 0.2 0.4 0.6 0.8 1 1.2 large signal inverting pulse response 1.4 1.6 1.8 2 ? output voltage ? v v o v i (2 v/div) v o (500 mv/div) v dd = 5 v r l = 600 ? and 10 k ? c l = 8 pf t a = 25 c figure 35 t ? time ? s 0 0.2 0.4 0.6 0.8 1 1.2 large signal inverting pulse response 1.4 1.6 1.8 2 ? output voltage ? v v o v i (5 v/div) v o (2 v/div) v dd = 12 v r l = 600 ? and 10 k ? c l = 8 pf t a = 25 c figure 36 t ? time ? s 0 0.1 0.2 0.3 0.4 0.5 0.6 small signal inverting pulse response 0.7 0.8 0.9 1 ? output voltage ? v v o v i (100 mv/div) v o (50 mv/div) v dd = 5 & 12 v r l = 600 ? and 10 k ? c l = 8 pf t a = 25 c figure 37 20 40 60 80 100 120 140 shutdown forward isolation vs frequency f - frequency - hz 100k 1m 10m 10k 100 1k sutdown forward isolation - db 100m v dd = 5 v c l = 0 pf t a = 25 c v i(pp) = 0.1, 2.5, and 5 v r l = 600 ? r l = 10 k ? figure 38 20 40 60 80 100 120 140 shutdown forward isolation vs frequency f - frequency - hz 100k 1m 10m 10k 100 1k sutdown forward isolation - db 100m v dd = 12 v c l = 0 pf t a = 25 c v i(pp) = 0.1, 8, and 12 v r l = 600 ? r l = 10 k ? figure 39 20 40 60 80 100 120 140 shutdown reverse isolation vs frequency f - frequency - hz 100k 1m 10m 10k 100 1k sutdown reverse isolation - db 100m r l = 600 ? r l = 10 k ? v dd = 5 v c l = 0 pf t a = 25 c v i(pp) = 0.1, 2.5, and 5 v figure 40 20 40 60 80 100 120 140 shutdown reverse isolation vs frequency f - frequency - hz 100k 1m 10m 10k 100 1k sutdown reverse isolation - db 100m v dd = 12 v c l = 0 pf t a = 25 c v i(pp) = 0.1, 8, and 12 v r l = 600 ? r l = 10 k ? figure 41 118 120 122 124 126 128 130 132 134 136 45678910111213141516 shutdown supply current vs supply voltage v dd - supply voltage - v i dd(shdn) ? shutdown supply current - a shutdown on r l = open v in = v dd/2 figure 42 60 80 100 120 140 160 180 ?55 ?25 5 35 65 95 125 shutdown supply current vs free-air temperature t a - free-air temperature - c v dd = 12 v a v = 1 v in = v dd/2 i dd(shdn) ? shutdown supply current - a v dd = 5 v slos219d ? june 1999 ? revised february 2004 17 www.ti.com post office box 1443 ? houston, texas 77251?1443 typical characteristics figure 43 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0 1020304050607080 ?2 ?4 2 6 t - time - s 0 ?6 4 shutdown pulse sd off v dd = 5 v c l = 8 pf t a = 25 c i dd r l = 600 ? i dd r l = 10 k ? i dd ? supply current ? ma shutdown pulse - v shutdown pulse figure 44 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0 1020304050607080 ?2 ?4 2 6 t - time - s 0 ?6 4 shutdown pulse sd off v dd = 12 v c l = 8 pf t a = 25 c i dd r l = 600 ? i dd r l = 10 k ? i dd ? supply current ? ma shutdown pulse - v shutdown pulse parameter measurement information _ + r null r l c l figure 45 application information input offset voltage null circuit the tlc070 and tlc071 has an input offset nulling function. refer to figure 46 for the diagram. n1 100 k ? + ? n2 r1 v dd ? out in ? in + note a: r1 = 5.6 k ? for offset voltage adjustment of 10 mv. r1 = 20 k ? for offset voltage adjustment of 3 mv. figure 46. input offset voltage null circuit slos219d ? june 1999 ? revised february 2004 18 www.ti.com post office box 1443 ? houston, texas 77251?1443 application information driving a capacitive load when the amplifier is configured in this manner, capacitive loading directly on the output will decrease the device?s phase margin leading to high frequency ringing or oscillations. therefore, for capacitive loads of greater than 10 pf, it is recommended that a resistor be placed in series (r null ) with the output of the amplifier, as shown in figure 47. a minimum value of 20 ? should work well for most applications. c load r f input output r g r null _ + figure 47. driving a capacitive load offset voltage the output of fset voltage, (v oo ) is the sum of the input of fset voltage (v io ) and both input bias currents (i ib ) times the corresponding gains. the following schematic and formula can be used to calculate the output offset voltage: v oo v io 1 r f r g i ib r s 1 r f r g i ib? r f + ? v i + r g r s r f i ib? v o i ib+ figure 48. output offset voltage model slos219d ? june 1999 ? revised february 2004 19 www.ti.com post office box 1443 ? houston, texas 77251?1443 application information high speed cmos input amplifiers the tlc07x is a family of high-speed low-noise cmos input operational amplifiers that has an input capacitance of the order of 20 pf. any resistor used in the feedback path adds a pole in the transfer function equivalent to the input capacitance multiplied by the combination of source resistance and feedback resistance. for example, a gain of ?10, a source resistance of 1 k ? , and a feedback resistance of 10 k ? add an additional pole at approximately 8 mhz. this is more apparent with cmos amplifiers than bipolar amplifiers due to their greater input capacitance. this is of little consequence on slower cmos amplifiers, as this pole normally occurs at frequencies above their unity-gain bandwidth. however, the tlc07x with its 10-mhz bandwidth means that this pole normally occurs at frequencies where there is on the order of 5 db gain left and the phase shift adds considerably. the effect of this pole is the strongest with large feedback resistances at small closed loop gains. as the feedback resistance is increased, the gain peaking increases at a lower frequency and the 180 phase shift crossover point also moves down in frequency, decreasing the phase margin. for the tlc07x, the maximum feedback resistor recommended is 5 k ? ; larger resistances can be used but a capacitor in parallel with the feedback resistor is recommended to counter the effects of the input capacitance pole. the tlc073 with a 1-v step response has an 80% overshoot with a natural frequency of 3.5 mhz when configured as a unity gain buffer and with a 10-k ? feedback resistor. by adding a 10-pf capacitor in parallel with the feedback resistor, the overshoot is reduced to 40% and eliminates the natural frequency, resulting in a much faster settling time (see figure 49). the 10-pf capacitor was chosen for convenience only. load capacitance had little effect on these measurements due to the excellent output drive capability of the tlc07x. _ + 600 ? 22 pf 50 ? 10 k ? 10 pf in with c f = 10 pf v dd = 5 v a v = +1 r f = 10 k ? r l = 600 ? c l = 22 pf v i ? input voltage ? v 0 0.5 1 1.5 1 0 ?1 2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 ? output voltage ? v v o t - time - s v in v out ?0.5 figure 49. 1-v step response slos219d ? june 1999 ? revised february 2004 20 www.ti.com post office box 1443 ? houston, texas 77251?1443 application information general configurations when receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. the simplest way to accomplish this is to place an rc filter at the noninverting terminal of the amplifier (see figure 50). v i v o c1 + ? r g r f r1 f ?3db 1 2 r1c1 v o v i 1 r f r g 1 1 sr1c1 figure 50. single-pole low-pass filter if even more attenuation is needed, a multiple pole filter is required. the sallen-key filter can be used for this task. for best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth. failure to do this can result in phase shift of the amplifier. v i c2 r2 r1 c1 r f r g r1 = r2 = r c1 = c2 = c q = peaking factor (butterworth q = 0.707) ( = 1 q 2 ? ) r g r f _ + f ?3db 1 2 rc figure 51. 2-pole low-pass sallen-key filter slos219d ? june 1999 ? revised february 2004 21 www.ti.com post office box 1443 ? houston, texas 77251?1443 application information shutdown function three members of the tlc07x family (tlc070/3/5) have a shutdown terminal (shdn ) for conserving battery life in portable applications. when the shutdown terminal is tied low, the supply current is reduced to 125 a/channel, the amplifier is disabled, and the outputs are placed in a high-impedance mode. to enable the amplifier, the shutdown terminal can either be left floating or pulled high. when the shutdown terminal is left floating, care should be taken to ensure that parasitic leakage current at the shutdown terminal does not inadvertently place the operational amplifier into shutdown. the shutdown terminal threshold is always referenced to the voltage on the gnd terminal of the device. therefore, when operating the device with split supply volta ges (e.g. 2.5 v), the shutdown terminal needs to be pulled to v dd ? (not system ground) to disable the operational amplifier. the amplifier?s output with a shutdown pulse is shown in figures 43 and 44. the amplifier is powered with a single 5-v supply and is configured as noninverting with a gain of 5. the amplifier turnon and turnoff times are measured from the 50% point of the shutdown pulse to the 50% point of the output waveform. the times for the single, dual, and quad are listed in the data tables. figures 37, 38, 39, and 40 show the amplifier?s forward and reverse isolation in shutdown. the operational amplifier is configured as a voltage follower (a v = 1). the isolation performance is plotted across frequency using 0.1 v pp , 2.5 v pp , and 5 v pp input signals at 2.5 v supplies and 0.1 v pp , 8 v pp , and 12 v pp input signals at 6 v supplies. circuit layout considerations to achieve the levels of high performance of the tlc07x, follow proper printed-circuit board design techniques. a general set of guidelines is given in the following. ground planes ? it is highly recommended that a ground plane be used on the board to provide all components with a low inductive ground connection. however, in the areas of the amplifier inputs and output, the ground plane can be removed to minimize the stray capacitance. proper power supply decoupling ? use a 6.8- f tantalum capacitor in parallel with a 0.1- f ceramic capacitor on each supply terminal. it may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1- f ceramic capacitor should always be used on the supply terminal of every amplifier. in addition, the 0.1- f capacitor should be placed as close as possible to the supply terminal. as this distance increases, the inductance in the connecting trace makes the capacitor less effective. the designer should strive for distances of less than 0.1 inches between the device power terminals and the ceramic capacitors. sockets ? sockets can be used but are not recommended. the additional lead inductance in the socket pins will often lead to stability problems. surface-mount packages soldered directly to the printed-circuit board is the best implementation. short trace runs/compact part placements ? optimum high performance is achieved when stray series inductance has been minimized. to realize this, the circuit layout should be made as compact as possible, thereby minimizing the length of all trace runs. particular attention should be paid to the inverting input of the amplifier. its length should be kept as short as possible. this will help to minimize stray capacitance at the input of the amplifier. surface-mount passive components ? using surface-mount passive components is recommended for high performance amplifier circuits for several reasons. first, because of the extremely low lead inductance of surface-mount components, the problem with stray ser ies inductance is greatly reduced. second, the small size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray inductance and capacitance. if leaded components are used, it is recommended that the lead lengths be kept as short as possible. slos219d ? june 1999 ? revised february 2004 22 www.ti.com post office box 1443 ? houston, texas 77251?1443 application information general powerpad design considerations the tlc07x is available in a thermally-enhanced powerpad family of packages. these packages are constructed using a downset leadframe upon which the die is mounted [see figure 52(a) and figure 52(b)]. this arrangement results in the lead frame being exposed as a thermal pad on the underside of the package [see figure 52 (c)]. because this thermal pad has di rect thermal contact with the die, excellent thermal performance can be achieved by providing a good thermal path away from the thermal pad. the powerpad package allows for both assembly and thermal management in one manufacturing operation. during the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be soldered to a copper area underneath the package. through the use of thermal paths within this copper area, heat can be conducted away from the package into either a ground plane or other heat dissipating device. the powerpad package represents a breakthrough in combining the small area and ease of assembly of surface mount with the, heretofore, awkward mechanical methods of heatsinking. die side view (a) end view (b) bottom view (c) die thermal pad note a: the thermal pad is electrically isolated from all terminals in the package. figure 52. views of thermally enhanced dgn package although there are many ways to properly heatsink the powerpad package, the following steps illustrate the recommended approach. 68 mils x 70 mils with 5 vias (via diameter = 13 mils) 78 mils x 94 mils with 9 via s (via diameter = 13 mils) thermal pad area single or dual quad figure 53. powerpad pcb etch and via pattern slos219d ? june 1999 ? revised february 2004 23 www.ti.com post office box 1443 ? houston, texas 77251?1443 application information general powerpad design considerations (continued) 1. prepare the pcb with a top side etch pattern as shown in figure 53. there should be etch for the leads as well as etch for the thermal pad. 2. place five holes (dual) or nine holes (quad) in the area of the thermal pad. these holes should be 13 mils in diameter. keep them small so that solder wicking through the holes is not a problem during reflow. 3. additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. this helps dissipate the heat generated by the tlc07x ic. these additional vias may be larger than the 13-mil diameter vias directly under the thermal pad. they can be larger because they are not in the thermal pad area to be soldered so that wicking is not a problem. 4. connect all holes to the internal ground plane. 5. when connecting these holes to the ground plane, do not use the typical web or spoke via connection methodology. web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. this makes the soldering of vias that have plane connections easier. in this application, however, low thermal resistance is desired for the most efficient heat transfer. therefore, the holes under the tlc07x powerpad package should make their connection to the internal ground plane with a complete connection around the entire circumference of the plated-through hole. 6. the top-side solder mask should leave the terminals of the package and the thermal pad area with its five holes (dual) or nine holes (quad) exposed. the bottom-side solder mask should cover the five or nine holes of the thermal pad area. this prevents solder from being pulled away from the thermal pad area during the reflow process. 7. apply solder paste to the exposed thermal pad area and all of the ic terminals. 8. with these preparatory steps in place, the tlc07x ic is simply placed in position and run through the solder reflow operation as any standard surface-mount component. this results in a part that is properly installed. for a given ja , the maximum power dissipation is shown in figure 54 and is calculated by the following formula: p d t max ?t a ja where: p d = maximum power dissipation of tlc07x ic (watts) t max = absolute maximum junction temperature (150 c) t a = free-ambient air temperature ( c) ja = jc + ca jc = thermal coefficient from junction to case ca = thermal coefficient from case to ambient air ( c/w) slos219d ? june 1999 ? revised february 2004 24 www.ti.com post office box 1443 ? houston, texas 77251?1443 application information general powerpad design considerations (continued) t j = 150 c 4 3 2 0 ?55 ?40 ?10 20 35 maximum power dissipation ? w 5 6 maximum power dissipation vs free-air temperature 7 65 95 125 1 t a ? free-air temperature ? c dgn package low-k test pcb ja = 52.3 c/w sot-23 package low-k test pcb ja = 324 c/w ?25 5 50 80 110 pwp package low-k test pcb ja = 29.7 c/w soic package low-k test pcb ja = 176 c/w pdip package low-k test pcb ja = 104 c/w note a: results are with no air flow and using jedec standard low-k test pcb. figure 54. maximum power dissipation vs free-air temperature the next consideration is the package constraints. the two sources of heat within an amplifier are quiescent power and output power. the designer should never forget about the quiescent heat generated within the device, especially multi-amplifier devices. because these devices have linear output stages (class a-b), most of the heat dissipation is at low output voltages with high output currents. the other key factor when dealing with power dissipation is how the devices are mounted on the pcb. the powerpad devices are extremely useful for heat dissipation. but, the device should always be soldered to a copper plane to fully use the heat dissipation properties of the powerpad. the soic package, on the other hand, is highly dependent on how it is mounted on the pcb. as more trace and copper area is placed around the device, ja decreases and the heat dissipation capability increases. the currents and voltages shown in these graphs are for the total package. for the dual or quad amplifier packages, the sum of the rms output currents and voltages should be used to choose the proper package. slos219d ? june 1999 ? revised february 2004 25 www.ti.com post office box 1443 ? houston, texas 77251?1443 application information macromodel information macromodel information provided was derived using microsim parts ? , the model generation software used with microsim pspice ? . the boyle macromodel (see note 1) and subcircuit in figure 55 are generated using the tlc07x typical electrical and operating characteristics at t a = 25 c. using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): maximum positive output voltage swing maximum negative output voltage swing slew rate quiescent power dissipation input bias current open-loop voltage amplification unity-gain frequency common-mode rejection ratio phase margin dc output resistance ac output resistance short-circuit output current limit note 2: g. r. boyle, b. m. cohn, d. o. pederson, and j. e. solomon, ?macromodeling of integrated circuit operational amplifiers,? ieee journal of solid-state circuits, sc-9, 353 (1974). pspice and parts are trademarks of microsim corporation. slos219d ? june 1999 ? revised february 2004 26 www.ti.com post office box 1443 ? houston, texas 77251?1443 application information out + ? + ? + ? + ? + ? + ? + ? + ? + ? v dd + rp in ? 2 in + 1 v dd ? vad rd1 11 j1 j2 10 rss iss 3 12 rd2 60 ve 54 de dp vc dc 4 c1 53 r2 6 9 egnd vb fb c2 gcm ga vlim 8 5 ro1 ro2 hlim 90 dlp 91 dln 92 vln vlp 99 7 .subckt tlc07x_5v 1 2 3 4 5 * c1 11 12 4.8697e?12 c2 6 7 8.0000e?12 css 10 99 4.0063e?12 dc 5 53 dy de 54 5 dy dlp 90 91 dx dln 92 90 dx dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 6.9132e6 ?1e3 1e3 6e6 ?6e6 ga 6 0 11 12 457.42e?6 gcm 0 6 10 99 1.1293e?6 iss 3 10 dc 183.67e?6 ioff 0 6 dc .806e?6 hlim 90 0 vlim 1k j1 11 2 10 jx1 j2 12 1 10 jx2 r2 6 9 100.00e3 rd1 4 11 2.1862e3 rd2 4 12 2.1862e3 ro1 8 5 10 ro2 7 99 10 rp 3 4 2.4728e3 rss 10 99 1.0889e6 vb 9 0 dc 0 vc 3 53 dc 1.5410 ve 54 4 dc .84403 vlim 7 8 dc 0 vlp 91 0 dc 119 vln 0 92 dc 119 .model dx d(is=800.00e?18) .model dy d(is=800.00e?18 rs=1m cjo=10p) .model jx1 pjf(is=1 17.50e?15 beta=1.1391e?3 vto=?1) .model jx2 pjf(is=1 17.50e?15 beta=1.1391e?3 vto=?1) .ends *device=tlc07x_5v, opamp, pjf, int * tlc07x ? 5v operational amplifier ?macromodel? subcircuit * created using parts release 8.0 on 12/16/99 at 08:38 * parts is a microsim product. * * connections: non-inverting input * inverting input * positive power supply * negative power supply * output * figure 55. boyle macromodel and subcircuit slos219d ? june 1999 ? revised february 2004 27 www.ti.com post office box 1443 ? houston, texas 77251?1443 thermal pad mechanical data dgq (s?pdso?g10) powerpad plastic small-outline slos219d ? june 1999 ? revised february 2004 28 www.ti.com post office box 1443 ? houston, texas 77251?1443 thermal pad mechanical data dgn (s?pdso?g8) powerpad plastic small-outline notes: technical brief, powerpad thermally enhanced package , texas instruments literature no. slma002 and application brief, powerpad made easy , texas instruments literature no. slma004. both documents are available at www.ti.com. powerpad is a trademark of texas instruments b. this drawing is subject to change without notice. c. for additional information on the powerpad ? package and how to take advantage of its heat dissipating abilities, refer to pptd041 not to scale to p vi e w 85 1 4 exposed pad 1,73 max 1,78 max a. all linear dimensions are in millimeters. slos219d ? june 1999 ? revised february 2004 29 www.ti.com post office box 1443 ? houston, texas 77251?1443 thermal pad mechanical data pptd027 pwp (r?pdso?g20) powerpad plastic small?outline mechanical data mpdi001a january 1995 revised june 1999 post office box 655303 ? dallas, texas 75265 p (r-pdip-t8) plastic dual-in-line 8 4 0.015 (0,38) gage plane 0.325 (8,26) 0.300 (7,62) 0.010 (0,25) nom max 0.430 (10,92) 4040082/d 05/98 0.200 (5,08) max 0.125 (3,18) min 5 0.355 (9,02) 0.020 (0,51) min 0.070 (1,78) max 0.240 (6,10) 0.260 (6,60) 0.400 (10,60) 1 0.015 (0,38) 0.021 (0,53) seating plane m 0.010 (0,25) 0.100 (2,54) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. falls within jedec ms-001 for the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm mechanical data msoi002b ? january 1995 ? revised september 2001 post office box 655303 ? dallas, texas 75265 d (r-pdso-g**) plastic small-outline package 8 pins shown 8 0.197 (5,00) a max a min (4,80) 0.189 0.337 (8,55) (8,75) 0.344 14 0.386 (9,80) (10,00) 0.394 16 dim pins ** 4040047/e 09/01 0.069 (1,75) max seating plane 0.004 (0,10) 0.010 (0,25) 0.010 (0,25) 0.016 (0,40) 0.044 (1,12) 0.244 (6,20) 0.228 (5,80) 0.020 (0,51) 0.014 (0,35) 1 4 8 5 0.150 (3,81) 0.157 (4,00) 0.008 (0,20) nom 0 ? 8 gage plane a 0.004 (0,10) 0.010 (0,25) 0.050 (1,27) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). d. falls within jedec ms-012 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) tlc070aid active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070aidr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070aidrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070aip active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc070aipe4 active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc070cd active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070cdgn active msop- power pad dgn 8 80 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070cdgnr active msop- power pad dgn 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070cdgnrg4 active msop- power pad dgn 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070cdr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070cdrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070cp active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc070cpe4 active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc070id active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070idgn active msop- power pad dgn 8 80 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070idgng4 active msop- power pad dgn 8 80 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070idgnr active msop- power pad dgn 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070idgnrg4 active msop- power pad dgn 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070idr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070idrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc070ip active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc070ipe4 active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc package option addendum www.ti.com 13-sep-2005 addendum-page 1 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) tlc071aid active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071aidr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071aidrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071aip active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc071aipe4 active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc071cd active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071cdg4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071cdgn active msop- power pad dgn 8 80 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071cdgnr active msop- power pad dgn 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071cdgnrg4 active msop- power pad dgn 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071cdr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071cdrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071cp active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc071cpe4 active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc071id active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071idgn active msop- power pad dgn 8 80 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071idgnr active msop- power pad dgn 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071idgnrg4 active msop- power pad dgn 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071idr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071idrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc071ip active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc071ipe4 active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc072aid active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim package option addendum www.ti.com 13-sep-2005 addendum-page 2 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) tlc072aidg4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072aidr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072aidrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072aip active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc072aipe4 active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc072cd active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072cdgn active msop- power pad dgn 8 80 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072cdgnr active msop- power pad dgn 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072cdr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072cdrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072cp active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc072cpe4 active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc072id active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072idg4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072idgn active msop- power pad dgn 8 80 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072idgng4 active msop- power pad dgn 8 80 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072idgnr active msop- power pad dgn 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072idgnrg4 active msop- power pad dgn 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072idr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072idrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc072ip active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc072ipe4 active pdip p 8 50 pb-free (rohs) cu nipdau level-nc-nc-nc tlc073aid active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim package option addendum www.ti.com 13-sep-2005 addendum-page 3 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) tlc073aidr active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073aidrg4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073ain active pdip n 14 25 pb-free (rohs) cu nipdau level-nc-nc-nc tlc073aine4 active pdip n 14 25 pb-free (rohs) cu nipdau level-nc-nc-nc tlc073cd active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073cdgq active msop- power pad dgq 10 80 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073cdgqr active msop- power pad dgq 10 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073cdgqrg4 active msop- power pad dgq 10 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073cdr active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073cdrg4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073cn active pdip n 14 25 pb-free (rohs) cu nipdau level-nc-nc-nc tlc073cne4 active pdip n 14 25 pb-free (rohs) cu nipdau level-nc-nc-nc tlc073id active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073idgq active msop- power pad dgq 10 80 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073idgqr active msop- power pad dgq 10 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073idgqrg4 active msop- power pad dgq 10 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073idr active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc073in active pdip n 14 25 pb-free (rohs) cu nipdau level-nc-nc-nc tlc073ine4 active pdip n 14 25 pb-free (rohs) cu nipdau level-nc-nc-nc tlc074aid active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc074aidr active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc074aidrg4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim TLC074AIN active pdip n 14 25 pb-free (rohs) cu nipd level-nc-nc-nc package option addendum www.ti.com 13-sep-2005 addendum-page 4 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) TLC074AINe4 active pdip n 14 25 pb-free (rohs) cu nipd level-nc-nc-nc tlc074aipwp active htssop pwp 20 70 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc074aipwpg4 active htssop pwp 20 70 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc074aipwpr active htssop pwp 20 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc074aipwprg4 active htssop pwp 20 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc074cd active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc074cdr active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc074cdrg4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc074cn active pdip n 14 25 pb-free (rohs) cu nipd level-nc-nc-nc tlc074cne4 active pdip n 14 25 pb-free (rohs) cu nipd level-nc-nc-nc tlc074cpwp active htssop pwp 20 70 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc074cpwpr active htssop pwp 20 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc074cpwprg4 active htssop pwp 20 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc074id active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc074idg4 active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc074idr active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc074idrg4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc074in active pdip n 14 25 pb-free (rohs) cu nipd level-nc-nc-nc tlc074ine4 active pdip n 14 25 pb-free (rohs) cu nipd level-nc-nc-nc tlc074ipwp active htssop pwp 20 70 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc074ipwpr preview htssop pwp 20 2000 tbd call ti call ti tlc075aid active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc075aidr active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc075aidrg4 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc075ain active pdip n 16 25 pb-free (rohs) cu nipdau level-nc-nc-nc tlc075aine4 active pdip n 16 25 pb-free (rohs) cu nipdau level-nc-nc-nc package option addendum www.ti.com 13-sep-2005 addendum-page 5 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) tlc075aipwp active htssop pwp 20 70 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc075aipwpr active htssop pwp 20 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc075aipwprg4 active htssop pwp 20 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc075cd active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc075cdr active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc075cn active pdip n 16 25 pb-free (rohs) cu nipdau level-nc-nc-nc tlc075cne4 active pdip n 16 25 pb-free (rohs) cu nipdau level-nc-nc-nc tlc075cpwp active htssop pwp 20 70 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc075cpwpr active htssop pwp 20 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc075cpwprg4 active htssop pwp 20 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc075id active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc075idg4 active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc075idr active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim tlc075in active pdip n 16 25 pb-free (rohs) cu nipdau level-nc-nc-nc tlc075ine4 active pdip n 16 25 pb-free (rohs) cu nipdau level-nc-nc-nc tlc075ipwp active htssop pwp 20 70 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc075ipwpr active htssop pwp 20 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year tlc075ipwprg4 active htssop pwp 20 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs) or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) package option addendum www.ti.com 13-sep-2005 addendum-page 6 (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 13-sep-2005 addendum-page 7 mechanical data mpdi001a january 1995 revised june 1999 post office box 655303 ? dallas, texas 75265 p (r-pdip-t8) plastic dual-in-line 8 4 0.015 (0,38) gage plane 0.325 (8,26) 0.300 (7,62) 0.010 (0,25) nom max 0.430 (10,92) 4040082/d 05/98 0.200 (5,08) max 0.125 (3,18) min 5 0.355 (9,02) 0.020 (0,51) min 0.070 (1,78) max 0.240 (6,10) 0.260 (6,60) 0.400 (10,60) 1 0.015 (0,38) 0.021 (0,53) seating plane m 0.010 (0,25) 0.100 (2,54) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. falls within jedec ms-001 for the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. resale of ti products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.com audio www.ti.com/audio data converters dataconverter.ti.com automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband interface interface.ti.com digital control www.ti.com/digitalcontrol logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security telephony www.ti.com/telephony video & imaging www.ti.com/video wireless www.ti.com/wireless mailing address: texas instruments post office box 655303 dallas, texas 75265 copyright ? 2005, texas instruments incorporated |
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